Senior DFT Engineer, Google Cloud

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide.

• Develop DFT strategy and architecture, including hierarchical DFT/Memory Built-In Self Test (MBIST), IJTAG/TAP, and Hi-Speed IO.
• Demonstrate ownership from DFT logic, pre-silicon verification, to co-work with test engineers post silicon.
• Insert DFT logic, including boundary scan, scan chains, DFT Compression, Logic Built-In Self Test (BIST), Test Access Point (TAP) controller, Clock Control block, and other DFT IP blocks.
• Insert and hook up MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
• Document DFT architecture and test sequences, including boot-up sequence associated with test pins.
• Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high test quality and support post-silicon test team.

• Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.
• 5 years of experience in DFT specification definition architecture and insertion.
• 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent).
• Experience with ASIC DFT synthesis, STA, simulation, and verification flow.
• Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, and debug of silicon issues, etc.).

• 401k matching
• Health insurance
• Flight privileges

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.